This invention relates to the field of magneto-resistive memory devices, and more particularly, to methods and apparatus for writing such magneto-resistive memory devices.
Digital memories of various kinds are used extensively in computer and computer system components, digital processing systems and the like. Such memories can be formed, to considerable advantage, based on the storage of digital bits as alternative states of magnetization of magnetic materials in each memory element, typically thin-film materials. These films may be thin magneto-resistive films having information stored therein based on the direction of the magnetization vector occurring in those films. The information is typically obtained either by inductive sensing to determine the magnetization state, or by magneto-resistive sensing of each state.
Such thin-film magneto-resistive memories may be conveniently provided on the surface of a monolithic integrated circuit to thereby provide easy electrical interconnection between the memory elements and the memory operating circuitry on the monolithic integrated circuit. When so provided, it is desirable to reduce the size and increase the packing density of the thin-film magneto-resistive memory elements to achieve a significant density of stored digital bits.
Many thin-film magneto-resistive memories include a number of parallel word lines intersected by a number of parallel digital lines. A thin magneto-resistive film or magneto-resistive bit is provided at the intersection of each word line and digital line. As such, the thin-film magneto-resistive memory elements are typically configured in an array configuration having a number of rows and a number of columns.
FIG. 1 is a schematic diagram illustrating a conventional thin-film Magnetic Random Access Memory (MRAM) architecture. Parallel word lines 12, 14, and 16 are provided in a vertical direction and parallel digital lines 18a-18h are provided in a horizontal direction. Only a portion of the MRAM array is shown in FIG. 1. A thin-film magneto-resistive memory element or magneto-resistive bit is provided at the intersection of each word line and digital line. For example, and referring specifically to FIG. 1, thin-film magneto-resistive bits 28a, 28b, and 28c are provided at the intersection of digital line 18a and word lines 12, 14, and 16, respectively.
The thin-film magneto-resistive bits in each row are typically connected in a string configuration to form a corresponding sense line. For example, thin-film magneto-resistive bits 28a, 28b, and 28c, which correspond to row 32, are connected in a string configuration to form sense line 34a. Sense line 34a typically includes a umber of non-magnetic connectors, such as non-magnetic connector 36, to connect each end of the thin-film magneto-resistive bits to the end of the adjacent thin-film magneto-resistive bits. The non-magnetic connectors are typically formed using a conventional metal interconnect layer. The sense lines are used to provide current to a particular row of thin-film magneto-resistive bits, and ultimately, to sense the resistance of a selected one of the bits.
To write a value (i.e., zero or one) to a selected magneto-resistive bit, a word line current is provided to the word line that passes adjacent to selected magneto-resistive bit. Likewise, a digital line current is provided to the digital line that passes adjacent to selected magneto-resistive bit. Depending on the selectivity of the memory, a sense line current may also be provided to the sense line that includes the selected magneto-resistive bit.
The polarity of the word line current typically determines the value that is written to the selected magneto-resistive bit. To illustrate this further, the magnetic fields produced by a word line current 40, a digital line current 42 and a sense line current 44 at magneto-resistive bit 28a are shown in FIG. 2, assuming digital line 18a and word line 12 extend above magneto-resistive bit 28a. The polarity of the various currents would of course change if the corresponding word line or digital line extend below the magneto-resistive bit 28a. 
The magnetic field Hwl 48 produced by word line current 40 extends to the right along the major axis of the magneto-resistive bit 28a as shown. The magnetic field Hd 50 produced by digital line current 18a extends downward along the minor axis of the magneto-resistive bit 28a. Finally, the magnetic field Hsl 52 produced by sense line current 44 also extends downward along the minor axis of the magneto-resistive bit 28a.
The magnetic field Hwl 48 produced by word line current 40 provides the longitudinal force to switch the magnetization vector of the selected magneto-resistive bit from left to right, which in the example shown, corresponds to the desired value to be written to the magneto-resistive bit 28a. The magnetic field Hdl 50 produced by digital line current 42 provides the lateral torque that is necessary to initiate the switching of the magnetic vector of the selected magneto-resistive bit 28a. In some cases, the magnetic field Hsl 52 may also be provided to provide additional lateral torque.
For many applications, it is beneficial to write an entire word of data to selected magneto-resistive bits during a single write cycle. This can be accomplished by organizing the magneto-resistive bits into a number of words. For example, and referring back to FIG. 1, each word of data may correspond to a corresponding row of magneto-resistive bits, such as row 32. One such word is shown at 60. While word 60 is shown including all magneto-resistive bits 28a, 28b and 28c in row 32, it is contemplated that word 60 may in some cases only include a subset of the magneto-resistive bits in row 32, such as the first xe2x80x9cnxe2x80x9d magneto-resistive bits of row 32.
In another configuration, each word of data may correspond to a column of magneto-resistive bits, such as column 70. One such word is shown at 72. Again, while word 72 is shown including all magneto-resistive bits 28a, 62a, 62b, 62c, 62d, 62e, 62f, and 62g in column 70, it is contemplated that word 72 may in some cases only include a subset of the magneto-resistive bits in column 70, such as the first xe2x80x9cnxe2x80x9d magneto-resistive bits of column 72.
When each word of data corresponds to a row or portion of a row of magneto-resistive bits, the digital lines 18a-18h and/or sense lines 34a-34h can be used to select a particular word during a write operation. This is often accomplished by decoding a write address 80 via decoder and control block 82, and passing a current down a selected digital line and/or sense line. For example, to select the magneto-resistive bits in row 32, decoder and control block 82 may pass a current down digital line 18a and/or sense line 34a. The remaining digital lines 18b-18h and/or sense lines 34b-34h may remain deactivated to prevent the magneto-resistive bits in deselected rows from being written.
Once the appropriate digital line 18a and/or sense line 34a is activated, decode and control block 82 may provide a word line current to all of the word lines that are associated with the magneto-resistive bits of the selected word. In the example shown in FIG. 1, this includes word lines 12, 14 and 16. The polarity of the word line current for each word line typically depends on the data state to be written to the corresponding magneto-resistive bit. In one example, if the first five bits of word 60 are to be written to a zero state, the word line current provided to the first five word lines may be in a first direction. Likewise, if the last three bits of word 60 are to be written to a one state, the word line current provided to the last three word lines may be in the opposite direction. Once the word line currents are activated for a sufficient period of time to write the corresponding magneto-resistive bits, decode and control block 82 may remove all word line currents, and then remove the digital line and/or sense line currents.
FIG. 3 shows a timing diagram for writing the first five bits of word 60 to a first state and the last three bits of word 60 to a second state. To select an appropriate row of magneto-resistive bits, a digital line current 90 (and possibly the sense line current 92) is first provided. With the appropriate row selected, word line currents Iwl0-4 94 for the first five word lines are provided in a first direction. This writes the first five magneto-resistive bits of row 32 to a zero state. At the same time, word line currents Iwl5-7 96 for the last three bits are provided in a second direction. This writes the last three magneto-resistive bits of row 32 to a one state.
When each word of data corresponds to a column or portion of a column of magneto-resistive bits, the word lines 12, 14 and 16 may be used to select a particular word during a write operation. That is, decode and control block 82 may decode write address 80 and pass a word line current down an appropriate word line, such as word line 12, to select word 72. The remaining word lines 14 and 16 may remain deactivated to prevent the magneto-resistive bits in deselected columns from being written.
Once the appropriate word line is activated, decode and control block 82 may provide a digital line current and/or sense line current to each of the digital lines and/or sense lines that correspond to word 70, such as digital lines 18a -18h and/or sense lines 34a-34h. Often, the decode and control block 82 first provides a word line current in a first direction, and only those digital lines 18a-18h and/or sense lines 34a-34h that correspond to bits that are to be written to a first data state are activated. Thereafter, the decode and control block 82 may reverse the word line current, and only those digital lines 18a-18h and/or sense lines 34a-34h that correspond to bits that are to be written to a second opposite data state are activated.
A timing diagram illustrating such a write operation is shown in FIG. 4. The decode and control block 82 typically first asserts those digital lines and/or sense lines that correspond to bits that are to be written to a first logic state. In the example shown, the first five digital lines and/or sense lines are activated, as shown at 104 and 106, respectively. Thereafter, and to select an appropriate word, the decode and control block 82 provides a word line current to the appropriate word line. The word line current is provided in a first direction, as shown at 100. When the word line is activated, the first five magneto-resistive bits of word 72 are written to the first logic state. Once written, the word line current is deactivated, as shown. Then, the last three digital lines and/or the last three sense lines are activated, as shown at 108 and 110, respectively. Once activated, the word line current is reversed and provided in a second direction. When the word line is activated, the last three magneto-resistive bits of word 72 are written to the second logic state.
Many of the above-described writing techniques can result in relatively high peak currents. It is known that for many magneto-resistive bit structures, such as GMR bit structures, significant word line and/or digital line currents are required to change the magnetic state of the bits. Accordingly, when multiple bits are simultaneously written, as described above, the resulting peak current can be significant. The relatively high peak currents can have a significant impact on the performance and design of a memory. For example, the relatively high peak currents can cause an increase in noise on the power supply terminals of the memory, which can reduce the read and write margin of the memory. In addition, and because of the relatively high peak currents, the minimum line widths used to distribute the current may have to be increased to prevent electromigration of the metal. This can reduce the overall density of the memory.
Another limitation of many prior art writing schemes is that the digital line and/or sense line current typically remains on after the word line current is removed. By removing the word line current before the digital line current, the effective writability of the memory may be reduced. Reference is made to FIG. 2 to further illustrate this limitation. Initially, and as indicated at 112, the magneto-resistive bit 28a has an initial magnetization direction 110a that points to the left. At this time, both the digital line current 42 and the word line current 40 are zero, as shown in the timing chart at 112. Thereafter, and as indicated at 114, a digital line current 42 is applied, but the word line current 40 is still zero. The digital line current 42 produces a magnetic field HDL 50, which when added to the demagnetization field along 110a, produces an effective magnetic field vector 110b. 
As indicated at 116, both the digital line current 42 and the word line current 40 are then applied. The word line current 42 produces a magnetic field HWL 48, which rotates the magnetization vector of the magneto-resistive bit 28a, resulting in an effective field vector 110c. Once the magnetization vector has been rotated as indicated at 118, the word line current 40 is removed. However, because the digital line current 42 remains on, the effective field vector 110c becomes vector 110d. As a result of an off-axis field 110d, the magnetization reversal of MR bit 28a might be incomplete. Consequently, as indicated at 120, when both the digital line current 42 and the word line current 40 are removed, the final state of the magnetization may be in an undesired state, which may cause bit errors.
The present invention overcomes many of the disadvantages of the prior art by providing write techniques for magneto-resistive memories that reduce the peak current during a write operation. In a preferred embodiment, this is accomplished by sequentially activating selected word lines, digital lines and/or sense lines. Because the word lines, digital lines and/or sense lines are sequentially activated, rather than activated in parallel, the peak current experienced during write operations may be reduced.
The present invention also provides write techniques that increase the margin of write operations of magneto-resistive memories. This is preferably accomplished by actively forcing the magnetization vector of a magneto-resistive bit to be substantially parallel with the major axis of the magneto-resistive bit during the write operation.
As indicated above, many magneto-resistive memories have a number of magneto-resistive bits organized into a number of words. In some memory architectures, all of the magneto-resistive bits in a word are selected by a common digital line and/or a common sense line, and each bit in a word is selected by a different word line. In other memory architectures, all of the magneto-resistive bits in a word are selected by a common word line, and each bit in a word is selected by a different digital line and/or different sense line.
In first illustrative embodiment of the present invention, all of the magneto-resistive bits in a word are selected by a common word line, and each magneto-resistive bit in a particular word is selected by a different digital line and/or sense line. To write such a memory, a selected one of the word lines is first activated to select all of the magneto-resistive bits in a desired word. Thereafter, the digital lines and/or sense lines that correspond to selected magneto-resistive bits in the desired word are sequentially activated. Because the digital lines and/or sense lines are sequentially activated, rather than activated in parallel, the peak currents experienced during write operations may be reduced.
The polarity of the word line current typically determines the value that is written to the corresponding magneto-resistive bits. Accordingly, the word line current is preferably provided in a first direction, which selects all of the magneto-resistive bits in a desired word. Thereafter, a first subset of digital lines and/or sense lines are sequentially activated, wherein the first subset of digital lines and/or sense lines correspond to those magneto-resistive bits that are to be written to a first logic state. Then, the word line current is reversed, which again selects all of the magneto-resistive bits in the desired word. With the word line current reversed, a second subset of digital lines and/or sense lines are sequentially activated, wherein the second subset of digital lines and/or sense lines correspond to those magneto-resistive bits that are to be written to a second logic state.
In another illustrative embodiment of the present invention, all of the magneto-resistive bits in a word are selected by a common digital line, and each magneto-resistive bit in a particular word is selected by a different word line. To write such a memory, a selected one of the digital lines is first activated to select all of the magneto-resistive bits in a desired word. Thereafter, the word lines that correspond to selected magneto-resistive bits in the desired word are sequentially activated. Because the word lines are sequentially activated, rather than activated in parallel, the peak current experienced during a corresponding write operation may be reduced.
The selected digital line is activated during the entire period that the word lines are sequentially activated. Alternatively, the digital line may be separately activated each time a word line is activated. By only activating the selected digital line when a word line is activated, the overall power consumed by the memory device may be reduced.
As indicated above, the polarity of the word line current typically determines the value that is written to the corresponding magneto-resistive bit. Accordingly, the direction of the word line current for each word line is preferably dependent on the desired data state to be written. For example, a word line current is preferably provided in a first direction for those word lines that correspond to magneto-resistive bits that are to be written to a first logic state. Likewise, the word line current is preferably provided in a second direction for those word lines that correspond to magneto-resistive bits that are to be written to a second logic state.
Rather than only activating the selected digital line, it is contemplated that a corresponding sense line may also be activated. Preferably, the selected sense line corresponds to the same word as the selected digital line. The additional sense line current may improve selectivity by providing additional torque at the desired magneto-resistive bits to help rotate the magnetization vector of the selected magneto-resistive bits.
For some memories, the sense line current may be sufficient to provide the desired selectivity. That is, the digital line current may not be required. To write such a memory, a selected one of the sense lines is first activated to select all of the magneto-resistive bits in a desired word. Thereafter, the word lines that correspond to selected magneto-resistive bits in the desired word are sequentially activated. Because word lines are sequentially activated, rather than activated in parallel, the peak current experienced during a corresponding write operation may be reduced.
To increase the write margin of many magneto-resistive memory devices, the present invention also contemplates providing write techniques that actively force the magnetization vector of a magneto-resistive bit to be substantially parallel with the major axis of the magneto-resistive bit during a write operation. This is preferably accomplished by removing the word line current after the digital line and/or sense line currents are removed. Since the word line current typically generates a magnetic field along the major axis of the bit, the word line current helps actively force the magnetization vector of the bit to be substantially parallel with the major axis of the bit. By actively forcing the magnetization vector of the magneto-resistive bit to be substantially parallel with the major axis of the bit, the margin of the write operation may be increased.
In one illustrative method of the present invention, the word line current and the digital line current (and in some cases the sense line current) are initially provided. Once the magnetization vector of the desired bits are switched, the digital line current and/or sense line current are removed before the word line current is removed. With the digital line current and/or sense line current removed, the word line current can actively force the magnetization vector of the bits to be substantially parallel with the major axis of the bits.